Physical Design Engineer - STA

Tenstorrent
Santa Clara, California, United States
Full Time
Hybrid
Senior
USD 100,000 – 500,000
Science Rnd Non Medical

Posted 1 day ago

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Excellent 4.7

Job summary

The role involves driving static timing analysis and closure for high-performance AI chip designs, collaborating with various teams to debug constraints, optimize timing paths, and meet performance targets with a focus on silicon timing closure using tools like SDC, SPICE, and scripting.

Responsibilities

Drive static timing analysis and closure for complex, high-performance designs. Collaborate closely with logic, DFT, and physical design teams to debug constraints and optimize paths.

Qualifications

Constraints Debugging ECO Development Flow Development Noise & Crosstalk Analysis OCV Analysis Scripting (Python, Perl, TCL) SPICE Modeling Timing Analysis

7+ years of industry experience with a proven record of successful tapeouts is required. Candidates should have deep knowledge of STA tools and techniques, strong scripting skills, and familiarity with SPICE modeling.

English

Benefits

Competitive Compensation Package

Company

Tenstorrent

Tenstorrent

linkedin
Computer Hardware Manufacturing
Location
Santa Clara, California, United States

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Excellent 4.7
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